一种宽带高效CMOS缺相放大器的分析与设计

M. V. van Schie, M. van der Heijden, M. Acar, A. de Graauw, L. D. de Vreede
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引用次数: 22

摘要

本文分析和设计了一种新型的基于变压器的功率组合网络,用于高效的失相功率放大器(PA)。所提出的功率组合网络与两个65nm CMOS e类PA一起在PCB上实现。测量表明,在700MHz左右的29%带宽上,峰值输出功率超过30dBm。700MHz时的峰值输出功率为33.9dBm。在相同的29%带宽下,10dB的回退效率大于27.3%。在此带宽上,6dB的回退效率大于46.4%。在10dB功率退退范围内,650MHz的漏极效率大于50%,据我们所知,这是迄今为止CMOS淘汰PA中报道的最高退退效率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Analysis and design of a wideband high efficiency CMOS outphasing amplifier
This work presents the analysis and design of a novel transformer-based power combining network for an efficient outphasing power amplifier (PA). The proposed power combining network was implemented on PCB together with two 65nm CMOS class-E PA's. Measurements show a peak output power of more than 30dBm over a 29% bandwidth around 700MHz. The peak output power at 700MHz equals 33.9dBm. The 10dB back-off efficiency is larger than 27.3% over the same 29% bandwidth. The 6dB back-off efficiency is larger than 46.4% over this bandwidth. The drain efficiency at 650MHz is larger than 50% over a 10dB power back-off range, which is, to our best knowledge, the highest back-off efficiency reported in a CMOS outphasing PA to date.
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