{"title":"具有层次结构的高密度宏单元格生成器","authors":"K. Takeya, M. Nagatani, S. Horiguchi","doi":"10.1109/CICC.1989.56818","DOIUrl":null,"url":null,"abstract":"A parameterizable generator that can generate macrocells with multilevel hierarchies is described. High-density macrocells that incorporate random logic can be laid out automatically. The system generates full-custom macrocell layouts, sea-of-gates masterslice layouts, standard cell descriptions for such macrocells, and equivalent logic and function models for chip-level simulations","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"349 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A generator for high-density macrocells with hierarchical structure\",\"authors\":\"K. Takeya, M. Nagatani, S. Horiguchi\",\"doi\":\"10.1109/CICC.1989.56818\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A parameterizable generator that can generate macrocells with multilevel hierarchies is described. High-density macrocells that incorporate random logic can be laid out automatically. The system generates full-custom macrocell layouts, sea-of-gates masterslice layouts, standard cell descriptions for such macrocells, and equivalent logic and function models for chip-level simulations\",\"PeriodicalId\":165054,\"journal\":{\"name\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"volume\":\"349 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1989.56818\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56818","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A generator for high-density macrocells with hierarchical structure
A parameterizable generator that can generate macrocells with multilevel hierarchies is described. High-density macrocells that incorporate random logic can be laid out automatically. The system generates full-custom macrocell layouts, sea-of-gates masterslice layouts, standard cell descriptions for such macrocells, and equivalent logic and function models for chip-level simulations