{"title":"多层印刷电路板中数字电路互连的设计考虑","authors":"A. Agrawal, C. S. Chang, D. A. Gernhart","doi":"10.1109/ICCD.1991.139949","DOIUrl":null,"url":null,"abstract":"The design considerations of signal lines in a multilayer printed circuit board are discussed. The effect of the orthogonal lines on the impedance, delay, and signal cross-talk is investigated for a single line and two coupled lines. The effect of loading and cross-over lines in the memory card design is also discussed.<<ETX>>","PeriodicalId":239827,"journal":{"name":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","volume":"123 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Design considerations for digital circuit interconnections in a multilayer printed circuit board\",\"authors\":\"A. Agrawal, C. S. Chang, D. A. Gernhart\",\"doi\":\"10.1109/ICCD.1991.139949\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design considerations of signal lines in a multilayer printed circuit board are discussed. The effect of the orthogonal lines on the impedance, delay, and signal cross-talk is investigated for a single line and two coupled lines. The effect of loading and cross-over lines in the memory card design is also discussed.<<ETX>>\",\"PeriodicalId\":239827,\"journal\":{\"name\":\"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors\",\"volume\":\"123 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-10-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCD.1991.139949\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1991.139949","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design considerations for digital circuit interconnections in a multilayer printed circuit board
The design considerations of signal lines in a multilayer printed circuit board are discussed. The effect of the orthogonal lines on the impedance, delay, and signal cross-talk is investigated for a single line and two coupled lines. The effect of loading and cross-over lines in the memory card design is also discussed.<>