紧凑的模型,适用于节能电路设计

M. Miura-Mattausch, H. Kikuchihara, T. Iizuka, T. Kajiwara, D. Navarro, H. Mattausch
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引用次数: 0

摘要

降低电路应用中的功率损耗是迫切的要求。对于电路设计的目的,了解功率损耗是先决条件。这里提出了一个适用于这一目的的紧凑模型。重点是把MOSFET作为目标。结果表明,对任意器件特性的一致描述以及对所有非理想特性的建模是实现准确预测功耗的关键。基于势的建模方法只是满足需求的可能性。讨论了影响电路效率的关键元件的建模问题。该模型不仅适用于先进的小型器件,也适用于电力电子器件。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Compact modeling applicable for power efficient circuit design
Urgent requirement is to minimize the power loss in circuit applications. For the purpose circuit design aware of power loss is prerequisite. Here a compact model applicable for the purpose is presented. Focus is given on MOSFET as the target. It is demonstrated that the consistent description for any device characteristics together with modeling all non-ideal features is the key for achieving the accurate prediction of the power consumption. The potential-based modeling approach is only the possibility to fulfill the requirements. Modeling of key elements affecting on circuit efficiency are discussed. The model is applicable not only for advanced small size devices but also for power electronics.
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