基于垂直凹槽阵列晶体管(VRAT)和PIPE(同一平面上的平面集成)的超高密度闪存新型三维结构

2008 Symposium on VLSI Technology Pub Date : 2008-06-17 DOI:10.1109/VLSIT.2008.4588587

Jiyoung Kim, A. Hong, M. Ogawa, Siguang Ma, E. B. Song, You-Sheng Lin, Je-Woo Han, U. Chung, K. Wang

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引用次数: 41

摘要

采用一种独特而简单的PIPE(同一平面上的平面化集成)三维集成方法制备了垂直凹槽阵列晶体管(VRAT)的三维快闪存储单元，从而成功实现了超高密度快闪存储。此外，还开发了使用另一种先进结构——Z-VRAT (Z-VRAT)进一步提高存储密度的程序。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Novel 3-D structure for ultra high density flash memory with VRAT (Vertical-Recess-Array-Transistor) and PIPE (Planarized Integration on the same PlanE)

A 3-D flash memory cell of VRAT (vertical-recess-array-transistor) has been fabricated using a unique and simple 3-D integration method of PIPE (planarized integration on the same plane), which allows for the successful implementation of ultra high density flash memory. In addition, procedures to increase the memory density further using another advanced structure, Zigzag-VRAT (Z-VRAT), are developed.

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2008 Symposium on VLSI Technology

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