降低电力相关系统成本的架构方法

S. Gunther
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引用次数: 3

摘要

随着晶体管数量的增加和时钟频率的增加,现代处理器的功耗正在稳步增加。为了对抗这一趋势,集成电路设计人员正在积极地采用设计优化来最小化电路功耗。降低功耗是英特尔Pentium 4处理器设计团队的一个重点,设计团队从一开始就专注于在不影响其他设计目标的情况下降低功耗。许多技术,既有创新的,也有已有的,被应用于处理器的所有功能单元,以努力消除不必要的功耗。这些技术的大量采用大大降低了最大和典型处理器功耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Architectural approaches to reducing power related system costs
The power dissipation of modern processors is steadily increasing, keeping pace with growing transistor counts and increasing clock frequencies. In an effort to counteract this trend, integrated circuit designers are aggressively employing design optimizations to minimize circuit power consumption. Power reduction was a key focus of the Intel Pentium 4 processor design team, and the design team focused from the beginning on reducing power consumption without compromising other design targets. Many techniques, both innovative and pre-existing, were applied across all functional units in the processor in an effort to eliminate unnecessary power consumption. The mass adoption of these techniques resulted in a significant reduction in both maximum and typical processor power dissipation.
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