异构工艺技术的未来挑战与机遇。迈向薄膜、零内在变异性器件、零功耗时代

S. Deleonibus, O. Faynot, Thomas Ernst, M. Vinet, P. Batude, F. Andrieu, O. Weber, David K. C. Cooper, François Bertin, Hubert Moriceau, L. Dicioccio, T. Signamarcheix, M. Sanquer, X. Jehl, O. Cueto, H. Fanet, F. Martin, H. Okuno, F. Nemouchi, Gilles Poupon, Y. Lamy, D. Gasparutto, X. Baillin, L. Duraffourg, J. Arcamone, L. Perniola, B. D. Salvo, E. Vianello, L. Hutin, C. Poulain, Edith Beigne, R. Tiron, L. Pain, S. Tedesco, S. Barnola, N. Possémé, C. L. Royer, A. Villalon, R. Salot
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引用次数: 5

摘要

线性缩放CMOS遇到了许多障碍,这需要新的工艺模块,主要是由能源效率最大化驱动。在亚10nm节点级的制造将要求内在变异性接近于零。移动、多功能和自主系统的快速增长几乎不要求达到零功耗。本文描述了集成基于薄膜的器件、架构和系统以应对这些挑战的解决方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Future challenges and opportunities for heterogeneous process technology. Towards the thin films, Zero Intrinsic Variability devices, Zero Power era
Linear scaling CMOS has encountered many hurdles which request new process modules, driven mainly by the maximization of energy efficiency. Fabrication at the sub 10nm node level will request Intrinsic Variability approaching to zero. The rapid growth of mobile, multifunctional and autonomous systems is hardly demanding to reach Zero Power consumption. The solutions to integrate Thin Film based devices, architectures and systems in order to face these challenges are described.
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