{"title":"量子比特串比较器的面积和延迟效率设计","authors":"H. Babu, Lafifa Jamal, S. V. Dibbo, A. Biswas","doi":"10.1109/ISVLSI.2017.130","DOIUrl":null,"url":null,"abstract":"This paper presents a new technique of magnitudecomparator for quantum bit string comparison. In the proposedmethod, the comparison between two quantum bit strings isperformed with the optimum number of operations. We have alsoshown that the proposed technique has time complexityO(( + )), whereas the best known existing technique hasO(nlog n),where n is the number of quantum bits. In addition, wehave proposed another technique to produce a compact quantumcomparator circuit. We have also introduced three new quantumgates with unique unitary matrices which represent the proposedquantum circuit more compactly than the existing quantumgates. The proposed comparator circuit has been designed usingthe proposed quantum bit comparator circuit named MidpointQubits Comparison (MQC) Circuit and another proposedquantum bit comparator circuit named Rest Qubits Comparison(RQC) Circuit. The comparative study shows that the proposedcomparator circuit outperforms the existing comparators; e.g.,the proposed 64-qubit comparator improves 7.19% on number ofquantum gates, area and delay; and 50.39% on garbage outputsover the existing best one","PeriodicalId":187936,"journal":{"name":"2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Area and Delay Efficient Design of a Quantum Bit String Comparator\",\"authors\":\"H. Babu, Lafifa Jamal, S. V. Dibbo, A. Biswas\",\"doi\":\"10.1109/ISVLSI.2017.130\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new technique of magnitudecomparator for quantum bit string comparison. In the proposedmethod, the comparison between two quantum bit strings isperformed with the optimum number of operations. We have alsoshown that the proposed technique has time complexityO(( + )), whereas the best known existing technique hasO(nlog n),where n is the number of quantum bits. In addition, wehave proposed another technique to produce a compact quantumcomparator circuit. We have also introduced three new quantumgates with unique unitary matrices which represent the proposedquantum circuit more compactly than the existing quantumgates. The proposed comparator circuit has been designed usingthe proposed quantum bit comparator circuit named MidpointQubits Comparison (MQC) Circuit and another proposedquantum bit comparator circuit named Rest Qubits Comparison(RQC) Circuit. The comparative study shows that the proposedcomparator circuit outperforms the existing comparators; e.g.,the proposed 64-qubit comparator improves 7.19% on number ofquantum gates, area and delay; and 50.39% on garbage outputsover the existing best one\",\"PeriodicalId\":187936,\"journal\":{\"name\":\"2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-07-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVLSI.2017.130\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2017.130","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Area and Delay Efficient Design of a Quantum Bit String Comparator
This paper presents a new technique of magnitudecomparator for quantum bit string comparison. In the proposedmethod, the comparison between two quantum bit strings isperformed with the optimum number of operations. We have alsoshown that the proposed technique has time complexityO(( + )), whereas the best known existing technique hasO(nlog n),where n is the number of quantum bits. In addition, wehave proposed another technique to produce a compact quantumcomparator circuit. We have also introduced three new quantumgates with unique unitary matrices which represent the proposedquantum circuit more compactly than the existing quantumgates. The proposed comparator circuit has been designed usingthe proposed quantum bit comparator circuit named MidpointQubits Comparison (MQC) Circuit and another proposedquantum bit comparator circuit named Rest Qubits Comparison(RQC) Circuit. The comparative study shows that the proposedcomparator circuit outperforms the existing comparators; e.g.,the proposed 64-qubit comparator improves 7.19% on number ofquantum gates, area and delay; and 50.39% on garbage outputsover the existing best one