{"title":"用于AFE与传感器接口的sub-1V CMOS仪表放大器","authors":"F. Neves, J. Oliveira, Henrique Oliveira","doi":"10.1109/YEF-ECE52297.2021.9505076","DOIUrl":null,"url":null,"abstract":"This paper presents the design of a low-noise capacitively-coupled instrumentation amplifier with a sub-1V power supply, which is suitable for low-power sensor data acquisition systems. This amplifier is part of an Analog Front-end (AFE) which is implemented in a standard 130nm bulk CMOS technology. Beside the high-impedance input amplifier, the AFE includes a programmable switch-capacitor bandpass filter and a sigma-delta modulator. A chopper modulation technique is implemented to further reduce the flicker noise, with a positive feedback network to compensate the resulting low input impedance. The preliminary post-layout simulated results of the instrumentation amplifier achieves a total power consumption of 2.6μW, with an open loop gain of 87dB and a GBW of 584kHz and with the input reffered noise of 4.6μVrms and a NEF value of 4. The maximum CMRR of the amplifier is 101dB and the PSRR minus is greater than 66dB. For a sub 1V power supply, the input frequency range is up to 10 kHz.","PeriodicalId":445212,"journal":{"name":"2021 International Young Engineers Forum (YEF-ECE)","volume":"151 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A sub-1V CMOS Instrumentation Amplifier for an AFE Interfacing with Sensors\",\"authors\":\"F. Neves, J. Oliveira, Henrique Oliveira\",\"doi\":\"10.1109/YEF-ECE52297.2021.9505076\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design of a low-noise capacitively-coupled instrumentation amplifier with a sub-1V power supply, which is suitable for low-power sensor data acquisition systems. This amplifier is part of an Analog Front-end (AFE) which is implemented in a standard 130nm bulk CMOS technology. Beside the high-impedance input amplifier, the AFE includes a programmable switch-capacitor bandpass filter and a sigma-delta modulator. A chopper modulation technique is implemented to further reduce the flicker noise, with a positive feedback network to compensate the resulting low input impedance. The preliminary post-layout simulated results of the instrumentation amplifier achieves a total power consumption of 2.6μW, with an open loop gain of 87dB and a GBW of 584kHz and with the input reffered noise of 4.6μVrms and a NEF value of 4. The maximum CMRR of the amplifier is 101dB and the PSRR minus is greater than 66dB. For a sub 1V power supply, the input frequency range is up to 10 kHz.\",\"PeriodicalId\":445212,\"journal\":{\"name\":\"2021 International Young Engineers Forum (YEF-ECE)\",\"volume\":\"151 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-07-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 International Young Engineers Forum (YEF-ECE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/YEF-ECE52297.2021.9505076\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Young Engineers Forum (YEF-ECE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/YEF-ECE52297.2021.9505076","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A sub-1V CMOS Instrumentation Amplifier for an AFE Interfacing with Sensors
This paper presents the design of a low-noise capacitively-coupled instrumentation amplifier with a sub-1V power supply, which is suitable for low-power sensor data acquisition systems. This amplifier is part of an Analog Front-end (AFE) which is implemented in a standard 130nm bulk CMOS technology. Beside the high-impedance input amplifier, the AFE includes a programmable switch-capacitor bandpass filter and a sigma-delta modulator. A chopper modulation technique is implemented to further reduce the flicker noise, with a positive feedback network to compensate the resulting low input impedance. The preliminary post-layout simulated results of the instrumentation amplifier achieves a total power consumption of 2.6μW, with an open loop gain of 87dB and a GBW of 584kHz and with the input reffered noise of 4.6μVrms and a NEF value of 4. The maximum CMRR of the amplifier is 101dB and the PSRR minus is greater than 66dB. For a sub 1V power supply, the input frequency range is up to 10 kHz.