{"title":"cvd生长石墨烯纳米带场效应晶体管的输运特性","authors":"A. Lyons, A. Behnam, E. Chow, E. Pop","doi":"10.1109/DRC.2011.5994450","DOIUrl":null,"url":null,"abstract":"Graphene nanoribbons (GNRs) are promising candidates for nanoelectronics as interconnects or field-effect transistors (FETs) [1,2]. Previous GNR studies used chemically derived [1] or mechanically exfoliated [2] graphene, which are not practical for large scale fabrication. In this work we present a comprehensive analysis of GNR FETs obtained by chemical vapor deposition (CVD) [3], which is promising for creating wafer-scale circuits. We demonstrate low-bias, high-bias, and temperature-dependent measurements. We find that CVD GNRs have properties comparable to the best state-of-the-art GNRs obtained by other methods, suggesting that grain boundaries play a negligible role in sub-100 nm devices. This approach also serves to identify future challenges and represents a first step towards large-scale integration.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Transport properties of CVD-grown graphene nanoribbon field-effect transistors\",\"authors\":\"A. Lyons, A. Behnam, E. Chow, E. Pop\",\"doi\":\"10.1109/DRC.2011.5994450\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Graphene nanoribbons (GNRs) are promising candidates for nanoelectronics as interconnects or field-effect transistors (FETs) [1,2]. Previous GNR studies used chemically derived [1] or mechanically exfoliated [2] graphene, which are not practical for large scale fabrication. In this work we present a comprehensive analysis of GNR FETs obtained by chemical vapor deposition (CVD) [3], which is promising for creating wafer-scale circuits. We demonstrate low-bias, high-bias, and temperature-dependent measurements. We find that CVD GNRs have properties comparable to the best state-of-the-art GNRs obtained by other methods, suggesting that grain boundaries play a negligible role in sub-100 nm devices. This approach also serves to identify future challenges and represents a first step towards large-scale integration.\",\"PeriodicalId\":107059,\"journal\":{\"name\":\"69th Device Research Conference\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-06-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"69th Device Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DRC.2011.5994450\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"69th Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2011.5994450","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Transport properties of CVD-grown graphene nanoribbon field-effect transistors
Graphene nanoribbons (GNRs) are promising candidates for nanoelectronics as interconnects or field-effect transistors (FETs) [1,2]. Previous GNR studies used chemically derived [1] or mechanically exfoliated [2] graphene, which are not practical for large scale fabrication. In this work we present a comprehensive analysis of GNR FETs obtained by chemical vapor deposition (CVD) [3], which is promising for creating wafer-scale circuits. We demonstrate low-bias, high-bias, and temperature-dependent measurements. We find that CVD GNRs have properties comparable to the best state-of-the-art GNRs obtained by other methods, suggesting that grain boundaries play a negligible role in sub-100 nm devices. This approach also serves to identify future challenges and represents a first step towards large-scale integration.