{"title":"HBM封装集成:技术趋势、挑战和应用","authors":"S. Ramalingam","doi":"10.1109/HOTCHIPS.2016.7936172","DOIUrl":null,"url":null,"abstract":"❯ Tb/s low latency bandwidth and lower system power is driving the need for HBM adoption ❯ Silicon Interposer (2.5D) is the incumbent technology of choice. Potentially lower cost, fine pitch interconnect wafer-level and substrate based technologies are emerging ❯ To drive broader adoption of HBM applications (cooling limited) and higher performance stacks (8-Hi), higher HBM junction temperature (>95C) needs to be supported","PeriodicalId":363333,"journal":{"name":"2016 IEEE Hot Chips 28 Symposium (HCS)","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"HBM package integration: Technology trends, challenges and applications\",\"authors\":\"S. Ramalingam\",\"doi\":\"10.1109/HOTCHIPS.2016.7936172\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"❯ Tb/s low latency bandwidth and lower system power is driving the need for HBM adoption ❯ Silicon Interposer (2.5D) is the incumbent technology of choice. Potentially lower cost, fine pitch interconnect wafer-level and substrate based technologies are emerging ❯ To drive broader adoption of HBM applications (cooling limited) and higher performance stacks (8-Hi), higher HBM junction temperature (>95C) needs to be supported\",\"PeriodicalId\":363333,\"journal\":{\"name\":\"2016 IEEE Hot Chips 28 Symposium (HCS)\",\"volume\":\"107 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Hot Chips 28 Symposium (HCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HOTCHIPS.2016.7936172\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Hot Chips 28 Symposium (HCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOTCHIPS.2016.7936172","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
HBM package integration: Technology trends, challenges and applications
❯ Tb/s low latency bandwidth and lower system power is driving the need for HBM adoption ❯ Silicon Interposer (2.5D) is the incumbent technology of choice. Potentially lower cost, fine pitch interconnect wafer-level and substrate based technologies are emerging ❯ To drive broader adoption of HBM applications (cooling limited) and higher performance stacks (8-Hi), higher HBM junction temperature (>95C) needs to be supported