{"title":"可靠性设计","authors":"S. Mourad, H. Fujiwara","doi":"10.1109/IMTC.2004.1351488","DOIUrl":null,"url":null,"abstract":"This paper explores an important aspect VLSI design: how can the design processes assure that a product is reliable. While reliability is closely related to yield, we will show that it is not sufficient to improve yield to assure high reliability. This is the first stage in exploring the topic and needs further study to reach some practical approach for design for reliability. In this paper we explore a methodology to guide the engineer's design choices toward an optimal implementation of reliable VLSI design.","PeriodicalId":386903,"journal":{"name":"Proceedings of the 21st IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.04CH37510)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Design for reliability\",\"authors\":\"S. Mourad, H. Fujiwara\",\"doi\":\"10.1109/IMTC.2004.1351488\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper explores an important aspect VLSI design: how can the design processes assure that a product is reliable. While reliability is closely related to yield, we will show that it is not sufficient to improve yield to assure high reliability. This is the first stage in exploring the topic and needs further study to reach some practical approach for design for reliability. In this paper we explore a methodology to guide the engineer's design choices toward an optimal implementation of reliable VLSI design.\",\"PeriodicalId\":386903,\"journal\":{\"name\":\"Proceedings of the 21st IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.04CH37510)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-05-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 21st IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.04CH37510)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMTC.2004.1351488\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 21st IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.04CH37510)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMTC.2004.1351488","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper explores an important aspect VLSI design: how can the design processes assure that a product is reliable. While reliability is closely related to yield, we will show that it is not sufficient to improve yield to assure high reliability. This is the first stage in exploring the topic and needs further study to reach some practical approach for design for reliability. In this paper we explore a methodology to guide the engineer's design choices toward an optimal implementation of reliable VLSI design.