用于SONET/SDH时钟生成的具有无命中开关的单片低带宽抖动清除锁相环

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers Pub Date : 2006-09-18 DOI:10.1109/ISSCC.2006.1696129

D. C. Wei, Yunteng Huang, B. Garlepp, J. Hein

{"title":"用于SONET/SDH时钟生成的具有无命中开关的单片低带宽抖动清除锁相环","authors":"D. C. Wei, Yunteng Huang, B. Garlepp, J. Hein","doi":"10.1109/ISSCC.2006.1696129","DOIUrl":null,"url":null,"abstract":"A single-chip jitter-cleaning PLL with hitless switching is presented. By utilizing the mostly-digital phase build-out technique, the steady-state output phase step after switching is bounded within 200ps. At the loop bandwidth of 800Hz, the maximum output phase transient slope is <4.5ns/ms. The jitter generation is 0.8ps in the OC48 band and 0.4ps in OC192 band. The 16.32mm2 chip is fabricated in a 0.25mum standard CMOS process and consumes 350mW at 3.3V","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A monolithic low-bandwidth jitter-cleaning PLL with hitless switching for SONET/SDH clock generation\",\"authors\":\"D. C. Wei, Yunteng Huang, B. Garlepp, J. Hein\",\"doi\":\"10.1109/ISSCC.2006.1696129\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A single-chip jitter-cleaning PLL with hitless switching is presented. By utilizing the mostly-digital phase build-out technique, the steady-state output phase step after switching is bounded within 200ps. At the loop bandwidth of 800Hz, the maximum output phase transient slope is <4.5ns/ms. The jitter generation is 0.8ps in the OC48 band and 0.4ps in OC192 band. The 16.32mm2 chip is fabricated in a 0.25mum standard CMOS process and consumes 350mW at 3.3V\",\"PeriodicalId\":166617,\"journal\":{\"name\":\"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2006.1696129\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2006.1696129","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 7

摘要

提出了一种单片无命中开关的除抖动锁相环。通过利用大多数数字相位构建技术，开关后的稳态输出相位步长被限制在200ps以内。在环路带宽为800Hz时，最大输出相位暂态斜率<4.5ns/ms。OC48频段的抖动产生为0.8ps, OC192频段的抖动产生为0.4ps。这款16.32mm2的芯片采用0.25 μ m标准CMOS工艺制造，在3.3V电压下功耗为350mW

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A monolithic low-bandwidth jitter-cleaning PLL with hitless switching for SONET/SDH clock generation

A single-chip jitter-cleaning PLL with hitless switching is presented. By utilizing the mostly-digital phase build-out technique, the steady-state output phase step after switching is bounded within 200ps. At the loop bandwidth of 800Hz, the maximum output phase transient slope is <4.5ns/ms. The jitter generation is 0.8ps in the OC48 band and 0.4ps in OC192 band. The 16.32mm2 chip is fabricated in a 0.25mum standard CMOS process and consumes 350mW at 3.3V

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2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers

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