HPC in a Vacuum: Evaluating Future Space Microprocessors

Advanced algorithms dictated by future mission needs are pushing space-borne computing requirements. Current platforms used in manned and unmanned spaceflight are limited by the intersection of radiation tolerance, power consumption, computing performance and safety critical features. Until recently, advanced instruction set architectures (ISAs), algorithm specific instructions, high speed external interfaces and high performance on-chip networks were eschewed from processor designs and current production spacecraft processors are based on past computing paradigms.Advances in processor manufacturing, emerging ISAs and machine learning techniques will significantly impact future system-on-chip (SoC) designs, enabling true high-performance space computing. To better understand the computational requirements of modern spacecraft, a comprehensive set of benchmarks that include basic system characterization, high performance computing, navigation and landing, image recognition, route finding, data mining and machine learning are necessary to characterize candidate architectures. The analysis of these space flight focused algorithms will drive the design of next generation space computing SoCs.