Yu Hsiang-Meng, Lin Chih-Chen, Hsu Min-hsuan, Chen Yen-Ting, Chen Kuang-Wei, T. Luoh, Yang Ling-Wu, Yang Tahone, Chen Kuang-Chao
{"title":"基于机器学习的CMP工艺优化工程","authors":"Yu Hsiang-Meng, Lin Chih-Chen, Hsu Min-hsuan, Chen Yen-Ting, Chen Kuang-Wei, T. Luoh, Yang Ling-Wu, Yang Tahone, Chen Kuang-Chao","doi":"10.1109/ISSM51728.2020.9377524","DOIUrl":null,"url":null,"abstract":"Advanced Chemical-mechanical polishing (CMP) process not only needs to maintain stable run-to-run thickness control to achieve better within wafer/within chip planarization performance, but also have capability to cover various topologies and layout densities patterned wafer and preventing the hot spots occurrences. In this study, different Neural-Network algorithm with data pre-processing models are implemented to the in-line CMP CLC tuning and dishing/erosion prediction at various topology/pattern density incoming pattern wafers to resolve the most challenging process issues at next generation.","PeriodicalId":270309,"journal":{"name":"2020 International Symposium on Semiconductor Manufacturing (ISSM)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"CMP Process Optimization Engineering by Machine Learning\",\"authors\":\"Yu Hsiang-Meng, Lin Chih-Chen, Hsu Min-hsuan, Chen Yen-Ting, Chen Kuang-Wei, T. Luoh, Yang Ling-Wu, Yang Tahone, Chen Kuang-Chao\",\"doi\":\"10.1109/ISSM51728.2020.9377524\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Advanced Chemical-mechanical polishing (CMP) process not only needs to maintain stable run-to-run thickness control to achieve better within wafer/within chip planarization performance, but also have capability to cover various topologies and layout densities patterned wafer and preventing the hot spots occurrences. In this study, different Neural-Network algorithm with data pre-processing models are implemented to the in-line CMP CLC tuning and dishing/erosion prediction at various topology/pattern density incoming pattern wafers to resolve the most challenging process issues at next generation.\",\"PeriodicalId\":270309,\"journal\":{\"name\":\"2020 International Symposium on Semiconductor Manufacturing (ISSM)\",\"volume\":\"8 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-12-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 International Symposium on Semiconductor Manufacturing (ISSM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSM51728.2020.9377524\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Symposium on Semiconductor Manufacturing (ISSM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSM51728.2020.9377524","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
CMP Process Optimization Engineering by Machine Learning
Advanced Chemical-mechanical polishing (CMP) process not only needs to maintain stable run-to-run thickness control to achieve better within wafer/within chip planarization performance, but also have capability to cover various topologies and layout densities patterned wafer and preventing the hot spots occurrences. In this study, different Neural-Network algorithm with data pre-processing models are implemented to the in-line CMP CLC tuning and dishing/erosion prediction at various topology/pattern density incoming pattern wafers to resolve the most challenging process issues at next generation.