非对称自级联码与梯度通道SOI nmosfet的跨电容比较分析

C. Alves, L. d'Oliveira, M. de Souza
{"title":"非对称自级联码与梯度通道SOI nmosfet的跨电容比较分析","authors":"C. Alves, L. d'Oliveira, M. de Souza","doi":"10.1109/LAEDC54796.2022.9907771","DOIUrl":null,"url":null,"abstract":"This work presents a comparative study of the transcapacitances of asymmetric self-cascode (A-SC) and graded-channel (GC) silicon-on-insulator (SOI) nMOSFETs, by means of two-dimensional numerical simulations. Simulated results show that the gate-to-drain capacitance is smaller for the ASC SOI device if compared to the GC SOI device, despite of the applied VDS.","PeriodicalId":276855,"journal":{"name":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Comparative Analysis of Transcapacitances in Asymmetric Self-Cascode and Graded-Channel SOI nMOSFETs\",\"authors\":\"C. Alves, L. d'Oliveira, M. de Souza\",\"doi\":\"10.1109/LAEDC54796.2022.9907771\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents a comparative study of the transcapacitances of asymmetric self-cascode (A-SC) and graded-channel (GC) silicon-on-insulator (SOI) nMOSFETs, by means of two-dimensional numerical simulations. Simulated results show that the gate-to-drain capacitance is smaller for the ASC SOI device if compared to the GC SOI device, despite of the applied VDS.\",\"PeriodicalId\":276855,\"journal\":{\"name\":\"2022 IEEE Latin American Electron Devices Conference (LAEDC)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-07-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Latin American Electron Devices Conference (LAEDC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LAEDC54796.2022.9907771\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LAEDC54796.2022.9907771","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

本文通过二维数值模拟的方法,对非对称自级联码(a - sc)和梯度通道(GC)绝缘体上硅(SOI) nmosfet的跨电容进行了比较研究。仿真结果表明,尽管施加了VDS, ASC SOI器件的栅极漏极电容比GC SOI器件小。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Comparative Analysis of Transcapacitances in Asymmetric Self-Cascode and Graded-Channel SOI nMOSFETs
This work presents a comparative study of the transcapacitances of asymmetric self-cascode (A-SC) and graded-channel (GC) silicon-on-insulator (SOI) nMOSFETs, by means of two-dimensional numerical simulations. Simulated results show that the gate-to-drain capacitance is smaller for the ASC SOI device if compared to the GC SOI device, despite of the applied VDS.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信