{"title":"基于脉冲响应的配电网芯片封装谐振建模","authors":"Y. Uematsu, H. Osaka, M. Yagyu, T. Saito","doi":"10.1109/SPI.2010.5483595","DOIUrl":null,"url":null,"abstract":"This paper proposes a method for modeling chip-package resonance using impulse response. To extract chip and package electrical circuit parameters, we assume a circuit equivalent to the loop from the chip to the package decoupling capacitor as the RL-RC parallel circuit and convert it into an RLC parallel circuit. We apply this method to devise an electrical circuit model capable of expressing chip-package resonance with high accuracy, as confirmed by experimental results.","PeriodicalId":293987,"journal":{"name":"2010 IEEE 14th Workshop on Signal Propagation on Interconnects","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Modeling of chip-package resonance in power distribution networks by an impulse response\",\"authors\":\"Y. Uematsu, H. Osaka, M. Yagyu, T. Saito\",\"doi\":\"10.1109/SPI.2010.5483595\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a method for modeling chip-package resonance using impulse response. To extract chip and package electrical circuit parameters, we assume a circuit equivalent to the loop from the chip to the package decoupling capacitor as the RL-RC parallel circuit and convert it into an RLC parallel circuit. We apply this method to devise an electrical circuit model capable of expressing chip-package resonance with high accuracy, as confirmed by experimental results.\",\"PeriodicalId\":293987,\"journal\":{\"name\":\"2010 IEEE 14th Workshop on Signal Propagation on Interconnects\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-05-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE 14th Workshop on Signal Propagation on Interconnects\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SPI.2010.5483595\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE 14th Workshop on Signal Propagation on Interconnects","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPI.2010.5483595","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Modeling of chip-package resonance in power distribution networks by an impulse response
This paper proposes a method for modeling chip-package resonance using impulse response. To extract chip and package electrical circuit parameters, we assume a circuit equivalent to the loop from the chip to the package decoupling capacitor as the RL-RC parallel circuit and convert it into an RLC parallel circuit. We apply this method to devise an electrical circuit model capable of expressing chip-package resonance with high accuracy, as confirmed by experimental results.