采用0.5 um增强/耗尽模式GaAs pHEMT的30ghz单片锁相环MMIC

F. Huang, Cheng-Kuo Lin, Yu-Chi Wang, Y. Chan
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引用次数: 2

摘要

利用0.5 μ m增强/耗尽模式(E/D)砷化镓pHEMTs制造了一种基于环形注入锁频分频器(RILFD)和级联码型压控振荡器(VCO)的锁相环(PLL) MMIC。在该电路中,设计了15 GHz级联振荡器,包括2次谐波级联缓冲放大器,产生30 GHz输出信号。为了使振荡信号与输入参考信号同步,采用注入锁定技术的宽锁定范围除以4的RILFD和级联混频器作为鉴相器,参考信号为3.75 GHz。采用RC低通滤波器和基于E/ d型逆变电路的直流放大器,可以进一步提高环路增益和输出相位噪声。在30ghz附近,锁定范围的测量结果约为400mhz,在2v直流电源和80mw功耗下,在1mhz偏置时输出相位噪声约为-116 dBc/Hz。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 30 GHz Single-Chip PLL MMIC Using 0.5 um Enhanced/Depletion-Mode GaAs pHEMT
A phase-locked loop (PLL) MMIC based on a ring-type injection-locked frequency divider (RILFD) and a cascode-type voltage-controlled oscillator (VCO) has been manufactured by using 0.5 mum enhanced/depletion mode (E/D) GaAs pHEMTs for Ka-band communications. In this circuit, the 15 GHz cascode oscillator including the 2nd harmonic cascode buffer amplifier was designed to generate a 30 GHz output signal. To synchronize the oscillation signal with the input reference signal, the wide locking-range divided-by-four RILFD using injection-locked technique and the cascode mixer to be a phase detector were used with a reference signal of 3.75 GHz. With a RC low-pass filter and a dc amplifier based on the E/D-mode inverter circuit, the loop gain and the output phase noise can be further improved. The measured result of the locking range is about 400 MHz near 30 GHz and the output phase noise is about -116 dBc/Hz at 1 MHz offset under a 2 V dc supply with 80 mW power consumption.
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