一个超大规模集成电路128通道数据链路控制

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1987.1157156

P. Chao, G. Cyr, T. Hiller, R. King, R. Wilson

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引用次数: 3

摘要

本文将描述一种从行为描述中自动提取160K晶体管并在1μm CMOS上制造的控制器。该芯片为367×390 mils，每个晶体管的器件密度为0.9 mils，时钟速率为8MHz时功耗为600mW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A VLSI 128-channel data link control

A controller with a 160K transistor automatically extracted from a behavorial description and fabricated in 1μm CMOS will be described. The chip is 367×390 mils, attaining a device density of 0.9mil2per transistor and dissipates 600mW at a clock rate of 8MHz.

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来源期刊

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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