SOI上背蚀刻超结LDMOST

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI:10.1109/ESSDER.2004.1356502

S. Honarkhah, S. Nassif-Khalil, C. Salama

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引用次数: 43

摘要

传统的超结LDMOSTs (SJLDMOSTs)是在SOI衬底上制造的，由于衬底损耗效应，其击穿电压较低。在这项工作中，提出了一种SOI上的背蚀刻SJLDMOST (BSJLDMOST)，通过消除器件下的硅衬底来克服这个问题。研究了BSJLDMOST在0.8 /spl mu/m SOI薄膜上的电学特性。SJ区面积为15.5 /spl mu/m的器件击穿电压为317 V，比导通电阻为48.3 m/spl Omega/cm/sup 2/，电荷导通电阻优值为4.1 /spl Omega/nC。为了验证反向蚀刻概念和抑制衬底耗尽效应，实现了超结二极管(BSJDs)。与传统的超级结二极管(sdd)相比，这些二极管的击穿电压提高了三倍，而无需去除器件背面的硅衬底。还讨论了如何优化BSJLDMOST以打破硅的限制。

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Back-etched super-junction LDMOST on SOI

Conventional super junction LDMOSTs (SJLDMOSTs), fabricated on an SOI substrate, suffer from low breakdown voltage due to substrate-depletion effects. In this work, a back etched SJLDMOST (BSJLDMOST) on SOI is proposed to overcome this problem by eliminating the silicon substrate under the device. The electrical characteristics of the BSJLDMOST on a 0.8 /spl mu/m SOI film were investigated. The device with 15.5 /spl mu/m of SJ region exhibits a breakdown voltage of 317 V, a specific on-resistance of 48.3 m/spl Omega/cm/sup 2/ and a charge on-resistance figure of merit of 4.1 /spl Omega/nC. To verify the back etching concept and the suppression of the substrate depletion effect, super-junction diodes (BSJDs) were implemented. These diodes feature a threefold improvement in breakdown voltage over conventional super junction diodes (SJDs) implemented without removing the silicon substrate on the back of the device. A discussion of how the BSJLDMOST can be optimized to break the silicon limit is also provided.

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Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)

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