New technique to improve transient response of LDO regulators without an off-chip capacitor

A new technique for low dropout (LDO) regulators operating without an off-chip capacitor is proposed. The technique restricts the output voltage drop to around 100mV when the load current switches from 0 to 200mA in 50ns. An on-chip load capacitance of 200pF is assumed. The proposed extra circuitry requires only 5 transistors and a small 1pf capacitor, consumes 110μA of quiescent current, and affects the LDO loop operation only when the output changes suddenly. Results are verified in Spice, for a 1.8-V LDO with a 2-V nominal input voltage and a 1.24-V reference voltage in an 180nm CMOS technology.