{"title":"顺序电路的延迟独立初始化","authors":"T. Chakraborty, V. Agrawal","doi":"10.1109/GLSV.1994.289964","DOIUrl":null,"url":null,"abstract":"We show that a given initialization sequence for a synchronous sequential circuit is not guaranteed to work correctly when arbitrary path delays are present in the circuit. In this paper, we present a novel robust-initialization procedure for sequential circuits. This procedure guarantees the correct initialization of state elements of a sequential circuit regardless of delays in the circuit. Every pattern of the normal initialization sequence is repeatedly clocked in flip-flops, so that excessive delays on combinational paths feeding flip-flops do not prevent the proper initialization. This method guarantees the correct initialization of pipeline circuits. For a general sequential circuit which may have feedbacks, we give a simulation procedure to determine the initial state of the circuit that is guaranteed to be correct for arbitrarily large but bounded delays.<<ETX>>","PeriodicalId":330584,"journal":{"name":"Proceedings of 4th Great Lakes Symposium on VLSI","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Delay independent initialization of sequential circuits\",\"authors\":\"T. Chakraborty, V. Agrawal\",\"doi\":\"10.1109/GLSV.1994.289964\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We show that a given initialization sequence for a synchronous sequential circuit is not guaranteed to work correctly when arbitrary path delays are present in the circuit. In this paper, we present a novel robust-initialization procedure for sequential circuits. This procedure guarantees the correct initialization of state elements of a sequential circuit regardless of delays in the circuit. Every pattern of the normal initialization sequence is repeatedly clocked in flip-flops, so that excessive delays on combinational paths feeding flip-flops do not prevent the proper initialization. This method guarantees the correct initialization of pipeline circuits. For a general sequential circuit which may have feedbacks, we give a simulation procedure to determine the initial state of the circuit that is guaranteed to be correct for arbitrarily large but bounded delays.<<ETX>>\",\"PeriodicalId\":330584,\"journal\":{\"name\":\"Proceedings of 4th Great Lakes Symposium on VLSI\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-03-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 4th Great Lakes Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GLSV.1994.289964\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 4th Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GLSV.1994.289964","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Delay independent initialization of sequential circuits
We show that a given initialization sequence for a synchronous sequential circuit is not guaranteed to work correctly when arbitrary path delays are present in the circuit. In this paper, we present a novel robust-initialization procedure for sequential circuits. This procedure guarantees the correct initialization of state elements of a sequential circuit regardless of delays in the circuit. Every pattern of the normal initialization sequence is repeatedly clocked in flip-flops, so that excessive delays on combinational paths feeding flip-flops do not prevent the proper initialization. This method guarantees the correct initialization of pipeline circuits. For a general sequential circuit which may have feedbacks, we give a simulation procedure to determine the initial state of the circuit that is guaranteed to be correct for arbitrarily large but bounded delays.<>