基于FPGA的高灵活轻量级高速真随机数发生器

Faqiang Mei, Lei Zhang, Chongyan Gu, Yuan Cao, Chenghua Wang, Weiqiang Liu
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引用次数: 13

摘要

真随机数发生器(TRNG)在信息安全系统中起着重要的作用。传统trng是利用热噪声、混沌电路等自然物理随机过程来产生随机数的。这些基于模拟电路的TRNG结构往往消耗大量的硬件资源,并且不容易集成到数字系统中。本文提出了一种低成本、高速度的TRNG,该TRNG由异或门嵌套多环振荡器(ROs)产生混合振荡。采用多组混合振荡异或运算,实现高速输出。提出的TRNG设计在Xilinx Artix-7 XC7A35T-1FTG256C FPGA上实现。它实现了高性能,吞吐量高达160 Mbps,在FPGA中使用37个ff和25个查找表(lut)。结果表明,所提出的TRNG设计成功通过了NIST SP800-22和AIS31的测试标准。与以往的设计相比,本文提出的TRNG设计实现了更低的硬件资源消耗和更高的速度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Highly Flexible Lightweight and High Speed True Random Number Generator on FPGA
True random number generator (TRNG), plays an important role in information security systems. Conventional TRNGs use natural physical stochastic processes including thermal noise, chaos-based circuit and so on to generate the random numbers. These analog circuit based TRNG structures often consume lots of hardware resources, and are not easy to be integrated in digital systems. In this paper, a low-cost and high-speed TRNG has been proposed by using mixed oscillation generated from XOR gates nested multiple ring oscillators (ROs). Multi-group mixed oscillation XOR operation is applied to obtain high-speed output. The proposed TRNG design is implemented on Xilinx Artix-7 XC7A35T-1FTG256C FPGA. It achieves a high performance with throughput up to 160 Mbps and with a usage of 37 FFs and 25 look up tables (LUTs) in the FPGA. The results show that the proposed TRNG design has successfully passed the testing standards of NIST SP800-22 and AIS31. Compared with previous designs, the proposed TRNG design achieves lower hardware resource consumption and higher speed.
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