{"title":"一个使用伪双线性开关电流积分器的3v二阶σ δ调制器","authors":"M. Loulou, H. Traff, P. Marchegay","doi":"10.1109/AMICD.1996.569395","DOIUrl":null,"url":null,"abstract":"This paper presents the design of a 3 V switched current second order sigma-delta modulator. The core element is a fully differential pseudo bilinear switched current integrator with current mode common mode feedback. The modulator is implemented in a 1.2 /spl mu/m double-metal digital CMOS process. Measurement results are presented and show a resolution of 11 bits.","PeriodicalId":356572,"journal":{"name":"1996 IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design. Proceedings","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A 3 V second order sigma delta modulator using a pseudo bilinear switched current integrator\",\"authors\":\"M. Loulou, H. Traff, P. Marchegay\",\"doi\":\"10.1109/AMICD.1996.569395\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design of a 3 V switched current second order sigma-delta modulator. The core element is a fully differential pseudo bilinear switched current integrator with current mode common mode feedback. The modulator is implemented in a 1.2 /spl mu/m double-metal digital CMOS process. Measurement results are presented and show a resolution of 11 bits.\",\"PeriodicalId\":356572,\"journal\":{\"name\":\"1996 IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design. Proceedings\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1996 IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design. Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/AMICD.1996.569395\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1996 IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AMICD.1996.569395","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 3 V second order sigma delta modulator using a pseudo bilinear switched current integrator
This paper presents the design of a 3 V switched current second order sigma-delta modulator. The core element is a fully differential pseudo bilinear switched current integrator with current mode common mode feedback. The modulator is implemented in a 1.2 /spl mu/m double-metal digital CMOS process. Measurement results are presented and show a resolution of 11 bits.