{"title":"基于fpga的专用管道处理器快速设计及其在计算流体力学中的应用","authors":"G. Lienhart, G. M. Martinez, A. Kugel, R. Männer","doi":"10.1109/FCCM.2006.60","DOIUrl":null,"url":null,"abstract":"This paper presents a framework for rapid development of FPGA based custom processors based on floating-point calculation units. The framework consists of a fully parameterized floating-point library, an easy-to-use pipeline generator and an interface generator for memory and I/O-modules. The performance of this approach is shown for the implementation of an SPH-algorithm.","PeriodicalId":123057,"journal":{"name":"2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Rapid Design of Special-Purpose Pipeline Processors with FPGAs and its Application to Computational Fluid Dynamics\",\"authors\":\"G. Lienhart, G. M. Martinez, A. Kugel, R. Männer\",\"doi\":\"10.1109/FCCM.2006.60\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a framework for rapid development of FPGA based custom processors based on floating-point calculation units. The framework consists of a fully parameterized floating-point library, an easy-to-use pipeline generator and an interface generator for memory and I/O-modules. The performance of this approach is shown for the implementation of an SPH-algorithm.\",\"PeriodicalId\":123057,\"journal\":{\"name\":\"2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-04-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FCCM.2006.60\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FCCM.2006.60","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Rapid Design of Special-Purpose Pipeline Processors with FPGAs and its Application to Computational Fluid Dynamics
This paper presents a framework for rapid development of FPGA based custom processors based on floating-point calculation units. The framework consists of a fully parameterized floating-point library, an easy-to-use pipeline generator and an interface generator for memory and I/O-modules. The performance of this approach is shown for the implementation of an SPH-algorithm.