D. Dautriche, P. Lestrat, G. Josse, F. Debrie, G. Borel, E. Thouret
{"title":"用于空间应用的0.8 /spl mu/m HSOI4CB耐辐射技术:以最小的设计风险加固现有组件的解决方案","authors":"D. Dautriche, P. Lestrat, G. Josse, F. Debrie, G. Borel, E. Thouret","doi":"10.1109/RADECS.1995.509769","DOIUrl":null,"url":null,"abstract":"For several years, TCS has been involved in the transfer of epitaxial CMOS technology of microprocessors such as 68020 from Motorola and in the development of hardened Standard or ASIC products. The know-how which has bean acquired during these operations has led us to develop a rad tolerant process totally compatible in terms of design rules with standard CMOS process. Named HSOI4CB (CB for Compatible Bulk), this process is a 0.8 /spl mu/m SOI CMOS with 2 levels of metallization. The use of the HSOI4CB technology allows us, without any specific effort on the design, to reach hardening levels compatible with space requirements up to more than 100 Krads.","PeriodicalId":310087,"journal":{"name":"Proceedings of the Third European Conference on Radiation and its Effects on Components and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"0.8 /spl mu/m HSOI4CB rad-tolerant technology for space applications: a solution to harden existing components with minimum design risk\",\"authors\":\"D. Dautriche, P. Lestrat, G. Josse, F. Debrie, G. Borel, E. Thouret\",\"doi\":\"10.1109/RADECS.1995.509769\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For several years, TCS has been involved in the transfer of epitaxial CMOS technology of microprocessors such as 68020 from Motorola and in the development of hardened Standard or ASIC products. The know-how which has bean acquired during these operations has led us to develop a rad tolerant process totally compatible in terms of design rules with standard CMOS process. Named HSOI4CB (CB for Compatible Bulk), this process is a 0.8 /spl mu/m SOI CMOS with 2 levels of metallization. The use of the HSOI4CB technology allows us, without any specific effort on the design, to reach hardening levels compatible with space requirements up to more than 100 Krads.\",\"PeriodicalId\":310087,\"journal\":{\"name\":\"Proceedings of the Third European Conference on Radiation and its Effects on Components and Systems\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-09-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the Third European Conference on Radiation and its Effects on Components and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RADECS.1995.509769\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Third European Conference on Radiation and its Effects on Components and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RADECS.1995.509769","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
摘要
几年来,TCS一直参与摩托罗拉68020等微处理器外延CMOS技术的转移,以及强化标准或ASIC产品的开发。在这些操作中获得的专有技术使我们开发出一种与标准CMOS工艺设计规则完全兼容的耐辐射工艺。该工艺被命名为HSOI4CB (CB for Compatible Bulk),是一个0.8 /spl mu/m的SOI CMOS,具有2级金属化。使用HSOI4CB技术,我们无需在设计上做任何特别的努力,就可以达到与空间要求兼容的硬化水平,最高可达100克拉。
0.8 /spl mu/m HSOI4CB rad-tolerant technology for space applications: a solution to harden existing components with minimum design risk
For several years, TCS has been involved in the transfer of epitaxial CMOS technology of microprocessors such as 68020 from Motorola and in the development of hardened Standard or ASIC products. The know-how which has bean acquired during these operations has led us to develop a rad tolerant process totally compatible in terms of design rules with standard CMOS process. Named HSOI4CB (CB for Compatible Bulk), this process is a 0.8 /spl mu/m SOI CMOS with 2 levels of metallization. The use of the HSOI4CB technology allows us, without any specific effort on the design, to reach hardening levels compatible with space requirements up to more than 100 Krads.