一个32b总线接口芯片

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1984.1156649

R. Schumann, W. Parker

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引用次数: 3

摘要

本报告将介绍一种提供600ns数据访问时间，13Mb带宽和错误检测的总线接口芯片。箝位(265 × 265mils)安装在132引脚陶瓷引脚网格阵列中，功耗为3.5W。

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A 32b bus interface chip

This report will cover a bus interface chip providing 600ns data access time, 13Mb bandwidth and error detection. The crip (265 × 265mils) is mounted in a 132 pin ceramic pin grid array and dissipates 3.5W.

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来源期刊

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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