Chip-scale packaging of power devices and its application in integrated power electronics modules

We present a power electronics packaging technology utilizing chip-scale packaged (CSP) power devices to build three-dimensional integrated power electronics modules (IPEMs). The chip-scale packaging structure, termed Die Dimensional Ball Grid Array (D/sup 2/BGA), eliminates wise bonds by using stacked solder bumps to interconnect power chips. D/sup 2/BGA package consists of a power chip, inner solder bumps, high-lead solder balls, and molding resin. It has the same lateral dimensions as the starting power chip, which makes high-density packaging and module miniature possible. This package enables the power chip to combine excellent thermal transfer, high current handling capability, improved electrical characteristics, and ultra-low profile packaging. Electrical tests show that the V/sub CE/(sat) and on-resistance of the D/sup 2/BGA high speed insulated-gate-bipolar transistors (IGBTs) are improved by 20% and 30% respectively by eliminating the device's wirebonds and other external interconnections, such as the leadframe. In this paper, we present the design, reliability, and processing issues of D/sup 2/BGA package, and the implementation of these chip-scale packaged power devices in building 30 kW half-bridge power converter modules. The electrical and reliability test results of the packaged devices and the power modules are reported.