基于45纳米SOI CMOS的5-15 GHz堆叠I/Q调制器,具有15-19 dBm OP1dB和26-30 dBm OIP3

S. Zihir, Gabriel M. Rebeiz
{"title":"基于45纳米SOI CMOS的5-15 GHz堆叠I/Q调制器,具有15-19 dBm OP1dB和26-30 dBm OIP3","authors":"S. Zihir, Gabriel M. Rebeiz","doi":"10.1109/CSICS.2017.8240436","DOIUrl":null,"url":null,"abstract":"In this paper, a 5–15 GHz I/Q modulator implemented in 45 nm SOI CMOS is presented, which shares DC current through biasing branch, I/Q mixers and stacked-FET power amplifier (PA) to provide high output power and linearity. Stacked SOI transistors are used to isolate the modulator from high voltage swing at the load and mitigate device break-down. The proposed architecture results in an OP1db and OIP3 of 15.6–19.5 dBm and 26–30 dBm at 5–15 GHz, respectively. The circuit occupies only 0.46 rnrn2 including pads. Application areas are in the 5G high-linearity IF circuity for high data-rate modulations.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 5–15 GHz stacked I/Q modulator with 15–19 dBm OP1dB and 26–30 dBm OIP3 in 45 nm SOI CMOS\",\"authors\":\"S. Zihir, Gabriel M. Rebeiz\",\"doi\":\"10.1109/CSICS.2017.8240436\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a 5–15 GHz I/Q modulator implemented in 45 nm SOI CMOS is presented, which shares DC current through biasing branch, I/Q mixers and stacked-FET power amplifier (PA) to provide high output power and linearity. Stacked SOI transistors are used to isolate the modulator from high voltage swing at the load and mitigate device break-down. The proposed architecture results in an OP1db and OIP3 of 15.6–19.5 dBm and 26–30 dBm at 5–15 GHz, respectively. The circuit occupies only 0.46 rnrn2 including pads. Application areas are in the 5G high-linearity IF circuity for high data-rate modulations.\",\"PeriodicalId\":129729,\"journal\":{\"name\":\"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSICS.2017.8240436\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS.2017.8240436","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

本文提出了一种采用45 nm SOI CMOS实现的5-15 GHz I/Q调制器,该调制器通过偏置支路、I/Q混频器和堆叠fet功率放大器(PA)共享直流电流,提供高输出功率和线性度。堆叠SOI晶体管用于隔离调制器在负载处的高电压振荡,并减轻器件击穿。该架构在5-15 GHz下的OP1db和OIP3分别为15.6-19.5 dBm和26-30 dBm。包括焊盘在内,该电路仅占用0.46 rnrn2。应用领域是用于高数据速率调制的5G高线性中频电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 5–15 GHz stacked I/Q modulator with 15–19 dBm OP1dB and 26–30 dBm OIP3 in 45 nm SOI CMOS
In this paper, a 5–15 GHz I/Q modulator implemented in 45 nm SOI CMOS is presented, which shares DC current through biasing branch, I/Q mixers and stacked-FET power amplifier (PA) to provide high output power and linearity. Stacked SOI transistors are used to isolate the modulator from high voltage swing at the load and mitigate device break-down. The proposed architecture results in an OP1db and OIP3 of 15.6–19.5 dBm and 26–30 dBm at 5–15 GHz, respectively. The circuit occupies only 0.46 rnrn2 including pads. Application areas are in the 5G high-linearity IF circuity for high data-rate modulations.
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