K. Sano, Atsushi Koshiba, Takaaki Miyajima, Tomohiro Ueno
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ESSPER: Elastic and Scalable System for High-Performance Reconfigurable Computing with Software-bridged APIs
Many-core CPUs and GPUs, present mainstream architectures for HPC, are facing difficulty in maintaining the same performance improvement rate because of the recent slow-down in the semiconductor scaling, the dark silicon problem, and wasteful mechanisms required for accelerating general-purpose computing such as a branch predictor and an out-of-order mechanism. Also, the power efficiency of HPC systems is significantly important to achieve higher performance.