{"title":"基于Tomlinson-Harashima预编码的多值数据传输双速率均衡","authors":"Yosuke Iijima, Y. Yuminaka","doi":"10.1109/ISMVL.2016.27","DOIUrl":null,"url":null,"abstract":"The data rate of VLSI system interconnections has been increasing in response to the demand for high-speed interfaces. At high-speed data rates, achieving data transmission without bit errors is difficult because of intersymbol interference (ISI). We have proposed high-speed data communication techniques for VLSI systems using Tomlinson-Harashima precoding (THP). Because THP can eliminate ISI by inverting the characteristics of channels with limited peak power at the transmitter, it is suitable for implementing advanced low-voltage, high-speed VLSI systems. In this study, to further improve the THP performance, a novel double-rate THP equalization technique designed especially for multi-valued data transmission is presented. Simulation and measurement results show that the proposed THP equalization with a double sampling rate can enhance the transition time of data and hence improve the eye opening.","PeriodicalId":246194,"journal":{"name":"2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2016-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Double-Rate Equalization Using Tomlinson-Harashima Precoding for Multi-valued Data Transmission\",\"authors\":\"Yosuke Iijima, Y. Yuminaka\",\"doi\":\"10.1109/ISMVL.2016.27\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The data rate of VLSI system interconnections has been increasing in response to the demand for high-speed interfaces. At high-speed data rates, achieving data transmission without bit errors is difficult because of intersymbol interference (ISI). We have proposed high-speed data communication techniques for VLSI systems using Tomlinson-Harashima precoding (THP). Because THP can eliminate ISI by inverting the characteristics of channels with limited peak power at the transmitter, it is suitable for implementing advanced low-voltage, high-speed VLSI systems. In this study, to further improve the THP performance, a novel double-rate THP equalization technique designed especially for multi-valued data transmission is presented. Simulation and measurement results show that the proposed THP equalization with a double sampling rate can enhance the transition time of data and hence improve the eye opening.\",\"PeriodicalId\":246194,\"journal\":{\"name\":\"2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-05-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.2016.27\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2016.27","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Double-Rate Equalization Using Tomlinson-Harashima Precoding for Multi-valued Data Transmission
The data rate of VLSI system interconnections has been increasing in response to the demand for high-speed interfaces. At high-speed data rates, achieving data transmission without bit errors is difficult because of intersymbol interference (ISI). We have proposed high-speed data communication techniques for VLSI systems using Tomlinson-Harashima precoding (THP). Because THP can eliminate ISI by inverting the characteristics of channels with limited peak power at the transmitter, it is suitable for implementing advanced low-voltage, high-speed VLSI systems. In this study, to further improve the THP performance, a novel double-rate THP equalization technique designed especially for multi-valued data transmission is presented. Simulation and measurement results show that the proposed THP equalization with a double sampling rate can enhance the transition time of data and hence improve the eye opening.