N. Koopman, G. Adema, S. Nangalia, M. Schneider, V. Saba
{"title":"使用改良的实验室对准器粘合的倒装芯片工艺开发技术","authors":"N. Koopman, G. Adema, S. Nangalia, M. Schneider, V. Saba","doi":"10.1109/IEMT.1995.526086","DOIUrl":null,"url":null,"abstract":"Tool modifications are described which have been made to a laboratory aligner bonder to allow specific process development techniques to be performed and evaluated for solder bump flip chip applications. Techniques described include: optics modifications to allow flip chip alignment to both rough and smooth surfaces; use of chip placement loads to permit temporary chip tacking for subsequent fluxless chip joining; thermal chucks for the flip chip rework operations of hot chip removal, site dress, and rejoining; and flattening of chip solder bumps for solder reflow/balling evaluations. These process steps are described with examples taken from MCNC's Flip Chip Technology Center Applications Laboratory using a Research Devices-modified M8A Aligner Bonder. The key tool parameters are indicated as well as the modifications made to enable the specific flip chip process steps to be performed.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Flip chip process development techniques using a modified laboratory aligner bonder\",\"authors\":\"N. Koopman, G. Adema, S. Nangalia, M. Schneider, V. Saba\",\"doi\":\"10.1109/IEMT.1995.526086\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Tool modifications are described which have been made to a laboratory aligner bonder to allow specific process development techniques to be performed and evaluated for solder bump flip chip applications. Techniques described include: optics modifications to allow flip chip alignment to both rough and smooth surfaces; use of chip placement loads to permit temporary chip tacking for subsequent fluxless chip joining; thermal chucks for the flip chip rework operations of hot chip removal, site dress, and rejoining; and flattening of chip solder bumps for solder reflow/balling evaluations. These process steps are described with examples taken from MCNC's Flip Chip Technology Center Applications Laboratory using a Research Devices-modified M8A Aligner Bonder. The key tool parameters are indicated as well as the modifications made to enable the specific flip chip process steps to be performed.\",\"PeriodicalId\":123707,\"journal\":{\"name\":\"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'\",\"volume\":\"60 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.1995.526086\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1995.526086","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Flip chip process development techniques using a modified laboratory aligner bonder
Tool modifications are described which have been made to a laboratory aligner bonder to allow specific process development techniques to be performed and evaluated for solder bump flip chip applications. Techniques described include: optics modifications to allow flip chip alignment to both rough and smooth surfaces; use of chip placement loads to permit temporary chip tacking for subsequent fluxless chip joining; thermal chucks for the flip chip rework operations of hot chip removal, site dress, and rejoining; and flattening of chip solder bumps for solder reflow/balling evaluations. These process steps are described with examples taken from MCNC's Flip Chip Technology Center Applications Laboratory using a Research Devices-modified M8A Aligner Bonder. The key tool parameters are indicated as well as the modifications made to enable the specific flip chip process steps to be performed.