使用改良的实验室对准器粘合的倒装芯片工艺开发技术

N. Koopman, G. Adema, S. Nangalia, M. Schneider, V. Saba
{"title":"使用改良的实验室对准器粘合的倒装芯片工艺开发技术","authors":"N. Koopman, G. Adema, S. Nangalia, M. Schneider, V. Saba","doi":"10.1109/IEMT.1995.526086","DOIUrl":null,"url":null,"abstract":"Tool modifications are described which have been made to a laboratory aligner bonder to allow specific process development techniques to be performed and evaluated for solder bump flip chip applications. Techniques described include: optics modifications to allow flip chip alignment to both rough and smooth surfaces; use of chip placement loads to permit temporary chip tacking for subsequent fluxless chip joining; thermal chucks for the flip chip rework operations of hot chip removal, site dress, and rejoining; and flattening of chip solder bumps for solder reflow/balling evaluations. These process steps are described with examples taken from MCNC's Flip Chip Technology Center Applications Laboratory using a Research Devices-modified M8A Aligner Bonder. The key tool parameters are indicated as well as the modifications made to enable the specific flip chip process steps to be performed.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Flip chip process development techniques using a modified laboratory aligner bonder\",\"authors\":\"N. Koopman, G. Adema, S. Nangalia, M. Schneider, V. Saba\",\"doi\":\"10.1109/IEMT.1995.526086\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Tool modifications are described which have been made to a laboratory aligner bonder to allow specific process development techniques to be performed and evaluated for solder bump flip chip applications. Techniques described include: optics modifications to allow flip chip alignment to both rough and smooth surfaces; use of chip placement loads to permit temporary chip tacking for subsequent fluxless chip joining; thermal chucks for the flip chip rework operations of hot chip removal, site dress, and rejoining; and flattening of chip solder bumps for solder reflow/balling evaluations. These process steps are described with examples taken from MCNC's Flip Chip Technology Center Applications Laboratory using a Research Devices-modified M8A Aligner Bonder. The key tool parameters are indicated as well as the modifications made to enable the specific flip chip process steps to be performed.\",\"PeriodicalId\":123707,\"journal\":{\"name\":\"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'\",\"volume\":\"60 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.1995.526086\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1995.526086","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

本文描述了对实验室对准器粘结器进行的工具修改,以允许执行特定的工艺开发技术,并对焊料凹凸倒装芯片应用进行评估。所描述的技术包括:光学修改,以允许倒装芯片对准粗糙和光滑的表面;使用贴片负载,允许临时贴片,以便随后进行无焊剂贴片连接;用于倒装芯片返工操作的热卡盘,包括热芯片移除、现场修整和重新连接;以及贴片焊料凸起的平坦度,用于焊料回流/成球评估。这些工艺步骤用MCNC倒装芯片技术中心应用实验室使用研究设备修改的M8A对齐器粘合器的例子进行了描述。指出了关键的工具参数以及为执行特定的倒装芯片工艺步骤而进行的修改。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Flip chip process development techniques using a modified laboratory aligner bonder
Tool modifications are described which have been made to a laboratory aligner bonder to allow specific process development techniques to be performed and evaluated for solder bump flip chip applications. Techniques described include: optics modifications to allow flip chip alignment to both rough and smooth surfaces; use of chip placement loads to permit temporary chip tacking for subsequent fluxless chip joining; thermal chucks for the flip chip rework operations of hot chip removal, site dress, and rejoining; and flattening of chip solder bumps for solder reflow/balling evaluations. These process steps are described with examples taken from MCNC's Flip Chip Technology Center Applications Laboratory using a Research Devices-modified M8A Aligner Bonder. The key tool parameters are indicated as well as the modifications made to enable the specific flip chip process steps to be performed.
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