{"title":"用二维LFSR自动合成多序列测试发生器","authors":"Xin Yuan, C.-i.H. Chen","doi":"10.1109/ASIC.1998.722807","DOIUrl":null,"url":null,"abstract":"Given a set of pre-computed test vectors obtained by an automatic test pattern generation (ATPG) tool for detecting random-pattern-resistant faults or particular hard-to-test faults presented in a circuit under test (CUT), a simple test generator based on a 2D linear feedback shift register (LFSR) structure is presented in this paper to generate a given test, followed by random patterns. Not only generating deterministic test vectors, the synthesized test generator also has a 2-D LFSR structure which generates better random patterns than a conventional LFSR. Experimental results are provided for practical circuits to demonstrate the effectiveness of the scheme. The scheme allows a trade-off between test vector storage and test hardware. A synthesis procedure of designing this test generator is presented.","PeriodicalId":104431,"journal":{"name":"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Automated synthesis of a multiple-sequence test generator using 2-D LFSR\",\"authors\":\"Xin Yuan, C.-i.H. Chen\",\"doi\":\"10.1109/ASIC.1998.722807\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Given a set of pre-computed test vectors obtained by an automatic test pattern generation (ATPG) tool for detecting random-pattern-resistant faults or particular hard-to-test faults presented in a circuit under test (CUT), a simple test generator based on a 2D linear feedback shift register (LFSR) structure is presented in this paper to generate a given test, followed by random patterns. Not only generating deterministic test vectors, the synthesized test generator also has a 2-D LFSR structure which generates better random patterns than a conventional LFSR. Experimental results are provided for practical circuits to demonstrate the effectiveness of the scheme. The scheme allows a trade-off between test vector storage and test hardware. A synthesis procedure of designing this test generator is presented.\",\"PeriodicalId\":104431,\"journal\":{\"name\":\"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1998.722807\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1998.722807","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Automated synthesis of a multiple-sequence test generator using 2-D LFSR
Given a set of pre-computed test vectors obtained by an automatic test pattern generation (ATPG) tool for detecting random-pattern-resistant faults or particular hard-to-test faults presented in a circuit under test (CUT), a simple test generator based on a 2D linear feedback shift register (LFSR) structure is presented in this paper to generate a given test, followed by random patterns. Not only generating deterministic test vectors, the synthesized test generator also has a 2-D LFSR structure which generates better random patterns than a conventional LFSR. Experimental results are provided for practical circuits to demonstrate the effectiveness of the scheme. The scheme allows a trade-off between test vector storage and test hardware. A synthesis procedure of designing this test generator is presented.