{"title":"Borden代码的自检检查器设计","authors":"S. Piestrak","doi":"10.1109/ICCD.1991.139978","DOIUrl":null,"url":null,"abstract":"A Borden code is an optimal code capable of detecting t-unidirectional errors. A new self-testing checker (STC) for Borden code is proposed. It is built of two blocks: a self-testing code-disjoint translator of the Borden code onto the one-out-of-r code (r>or=4) and a well-known STC for the one-out-of-r code. The translator is built of two multi-output threshold circuits and a NOT-AND-OR circuit. The new checker has significantly better performance than the STC for Borden code proposed previously by N. K. Jha (1989). Its highly regular modular structure and easy testability make it particularly attractive for a VLSI implementation.<<ETX>>","PeriodicalId":239827,"journal":{"name":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Design of a self-testing checker for Borden code\",\"authors\":\"S. Piestrak\",\"doi\":\"10.1109/ICCD.1991.139978\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A Borden code is an optimal code capable of detecting t-unidirectional errors. A new self-testing checker (STC) for Borden code is proposed. It is built of two blocks: a self-testing code-disjoint translator of the Borden code onto the one-out-of-r code (r>or=4) and a well-known STC for the one-out-of-r code. The translator is built of two multi-output threshold circuits and a NOT-AND-OR circuit. The new checker has significantly better performance than the STC for Borden code proposed previously by N. K. Jha (1989). Its highly regular modular structure and easy testability make it particularly attractive for a VLSI implementation.<<ETX>>\",\"PeriodicalId\":239827,\"journal\":{\"name\":\"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-10-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCD.1991.139978\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1991.139978","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
摘要
波登码是一种能够检测t-单向错误的最优码。提出了一种新的波登码自检器(STC)。它由两个块组成:一个将Borden代码转换为1 -out- r代码(r>或=4)的自我测试代码分离转换器,以及一个众所周知的用于1 -out- r代码的STC。该转换器由两个多输出阈值电路和一个非与或电路组成。新的检查器的性能明显优于之前由N. K. Jha(1989)提出的波登码STC。其高度规则的模块化结构和易于测试性使其对VLSI实现特别有吸引力。
A Borden code is an optimal code capable of detecting t-unidirectional errors. A new self-testing checker (STC) for Borden code is proposed. It is built of two blocks: a self-testing code-disjoint translator of the Borden code onto the one-out-of-r code (r>or=4) and a well-known STC for the one-out-of-r code. The translator is built of two multi-output threshold circuits and a NOT-AND-OR circuit. The new checker has significantly better performance than the STC for Borden code proposed previously by N. K. Jha (1989). Its highly regular modular structure and easy testability make it particularly attractive for a VLSI implementation.<>