光纤系统volterra dfe的高性能FPGA实现

A. Emeretlis, G. Theodoridis, G. Glentis
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引用次数: 7

摘要

提出了用于光纤链路的低复杂度Volterra决策反馈均衡器(vdfe)。通过在均衡器的前馈和反馈部分适当地丢弃大块系数,在不影响其效率的情况下实现了显着的复杂性降低。此外,还提供了合适的体系结构和高性能FPGA实现。结果表明,对于相同长度的链路,该算法的误码率与同类全尺寸vdfs相当,但所需的算法资源却减少了50%。此外,建议的dfe满足所需的10gb /s速率,在某些情况下可以达到17gb /s和25gb /s的速率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High-performance FPGA implementations of volterra DFEs for optical fiber systems
Low-complexity Volterra Decision Feedback Equalizers (VDFEs) for optical fiber links are proposed. By properly discarding large blocks of coefficients in the feedforward and feedback sections of the equalizer, a significant complexity reduction is achieved without affecting its efficiency. Moreover, suitable architectures and high-performance FPGA implementations are provided. It is demonstrated that the efficiency of the proposed VDFEs in terms of BER is similar to the counterpart full-size VDFEs for links of the same length, while, they demand 50% less arithmetic resources. Also, the proposed DFEs meet the desired 10 Gb/s rate and in certain cases achieve rates of 17 Gb/s and 25 Gb/s.
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