一种新的模拟方法，用于在0.18 μ m模拟，混合信号高压工艺技术上开发ESD原语

2011 International Conference on Simulation of Semiconductor Processes and Devices Pub Date : 2011-10-06 DOI:10.1109/SISPAD.2011.6035080

F. Roger, J. Cambieri, R. Minixhofer

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引用次数: 0

摘要

本文提出了一种用于高压技术中ESD原始器件开发的完整仿真方法。该工作流程基于布局生成、2D、3D和混合模式TCAD仿真以及SPICE仿真，可提供支持ESD压力测试的稳健设备。

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A novel simulation methodology for development of ESD primitives on a 0.18µm analog, mixed-signal high voltage process technology

This paper presents a full simulation methodology dedicated to the ESD primitive devices development in High Voltage technology. This workflow based on layout generation, 2D, 3D and mixed-mode TCAD simulations and SPICE simulations provide robust devices sustaining ESD stress tests.

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来源期刊

2011 International Conference on Simulation of Semiconductor Processes and Devices

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