一个实用的互连驱动ASIC设计程序

Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372) Pub Date : 1998-09-13 DOI:10.1109/ASIC.1998.722912

Mely Chen Chi, J. Tseng, C.Y. Lee, S. Huang

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引用次数: 1

摘要

为了缩短设计时间，在布放前正确地向综合工具提供网缆载荷是非常重要的。本文介绍了一种针对特定加工工艺和设计流程的线材载荷模型的创建过程。同时提出了一种物理到逻辑的层次映射程序，以便在布局前应用正确的线负载模型进行驱动综合。我们将这些方法应用到我公司0.6 /spl mu/m技术产品中作为例证。

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A practical interconnect driven ASIC design procedure

To shorten design time, it is very important to correctly supply the wire load of nets to the synthesis tool before layout. In this paper, a procedure to create wire load models for a specific processing technology and design flow is presented. Also a physical to logical hierarchy mapping procedure is proposed such that the correct wire load model may be applied to drive synthesis before layout. We apply these methodologies to our company's products of 0.6 /spl mu/m technology as illustrations.

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Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)

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