{"title":"一个低功耗的数字到模拟转换器的SAR adc使用一个参考电压","authors":"Seyed Behnam Yazdani, Ata Khorami, M. Sharifkhani","doi":"10.1109/IRANIANCEE.2015.7146378","DOIUrl":null,"url":null,"abstract":"A new low-power capacitive structure and its switching scheme for Successive Approximation Register (SAR) Digital to Analog Converter (DAC) is presented. The proposed method reduces power consumption by 93% and area by 50% compared to the conventional binary-weighted DAC. Moreover, only one reference voltage is used to avoid the effect of common mode voltage (Vcm) non-idealities on precision.","PeriodicalId":187121,"journal":{"name":"2015 23rd Iranian Conference on Electrical Engineering","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A low-power digital to analog converter for SAR ADCs using one reference voltage\",\"authors\":\"Seyed Behnam Yazdani, Ata Khorami, M. Sharifkhani\",\"doi\":\"10.1109/IRANIANCEE.2015.7146378\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new low-power capacitive structure and its switching scheme for Successive Approximation Register (SAR) Digital to Analog Converter (DAC) is presented. The proposed method reduces power consumption by 93% and area by 50% compared to the conventional binary-weighted DAC. Moreover, only one reference voltage is used to avoid the effect of common mode voltage (Vcm) non-idealities on precision.\",\"PeriodicalId\":187121,\"journal\":{\"name\":\"2015 23rd Iranian Conference on Electrical Engineering\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-05-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 23rd Iranian Conference on Electrical Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRANIANCEE.2015.7146378\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 23rd Iranian Conference on Electrical Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRANIANCEE.2015.7146378","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low-power digital to analog converter for SAR ADCs using one reference voltage
A new low-power capacitive structure and its switching scheme for Successive Approximation Register (SAR) Digital to Analog Converter (DAC) is presented. The proposed method reduces power consumption by 93% and area by 50% compared to the conventional binary-weighted DAC. Moreover, only one reference voltage is used to avoid the effect of common mode voltage (Vcm) non-idealities on precision.