超高压700V LDMOS ESD失效机理研究

Jian-Hsing Lee, T. Kao, C. Chan, Jin-Lian Su, H. Su, Kuo-Cheng Chang
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引用次数: 15

摘要

在超高压700V LDNMOS中发现了一种新的ESD失效机制。器件被自身电荷和电路板存储电荷损坏,而不是被HBM应力电流损坏。器件结电容和测试板电容存储雪崩击穿发生前ESD测试仪产生的电荷。雪崩击穿后,两个电容器释放储存的电荷,以提供额外的电流给设备施加压力。这种现象被称为充电电容器模型(CCM)[1]。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The ESD failure mechanism of ultra-HV 700V LDMOS
A new kind of ESD failure mechanism is found in the UHV 700V LDNMOS during the HBM ESD zapping event. The device is damaged by its own charges and board stored charges, not damaged by the HBM stress current. The device junction capacitor and test-board capacitor store the charges from the ESD tester before the avalanche breakdown occurring. After the avalanche breakdown, the two capacitors discharge the stored charges to give the additional currents to stress the device. This phenomenon is called the charged-capacitor model (CCM) [1].
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