作为参数提取工具的mosfet电流对衬底偏置特性

2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" Pub Date : 2019-06-01 DOI:10.23919/MIXDES.2019.8787068

D. Tomaszewski, J. Malesinska, G. Gluszko, K. Kucharski

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引用次数: 0

摘要

介绍了mosfet漏极电流对衬底偏置特性在器件参数提取中的应用。简要讨论了衬底偏置对MOSFET漏极电流影响的建模。提出了一种MOSFET的表征方法。它需要测量两个I(V)特性，包括以“扫描”模式测量的ID(VBS)平滑曲线。该方法可以提取阈值电压参数并估计衬底中的深度掺杂分布。所提出的方法是使用在ITE制造的mosfet在批量CMOS工艺中的I(V)数据来证明的。

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Current vs Substrate Bias Characteristics of MOSFETs as a Tool for Parameter Extraction

An application of the drain current vs substrate bias characteristics of MOSFETs for the device parameter extraction is presented. Modeling of the substrate bias effect on the MOSFET drain current is briefly discussed. A method of the MOSFET characterization is formulated. It requires a measurement of two I(V) characteristics, including the ID(VBS) smooth curve measured in a "sweep" mode. The method allows to extract the threshold voltage parameters and to estimate the in-depth doping profile in the substrate. The proposed approach is demonstrated using I(V) data of the MOSFETs manufactured in ITE in a bulk CMOS process.

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2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems"

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