Mohamad El-Chaar, A. A. L. Souza, M. Barragán, F. Podevin, S. Bourdel, J. Arnould
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引用次数: 1
摘要
提出了一种适用于毫米波的宽带全集成偏置天线。传统的偏置三通是根据电感值对rf扼流圈进行优化的,与之相比,本文提出的rf扼流圈将其低寄生电容作为设计参数之一。在实现宽带工作的同时,特别是在较低频率下,该偏置电路易于实现,抗共振稳健性强,有效地将功率输送到预期的宽带电路,并有助于减少集成电路(IC)实现的电路面积。作为概念验证,采用意法半导体的55纳米技术实现了低角频率(Flower)为5 GHz,上角频率(Fupper)接近100 GHz的宽带CMOS分布式放大器(DA),并将所提出的偏置电导连接到其人工漏极线。所实现的偏置tee可实现接近100 GHz的带宽,其rf扼流圈所需的表面积为82 μ m x 82 μ m。当与DA集成时,整个芯片面积保持不变(0.89 mm2)。布局后仿真显示,直流电源开销(由于包含片上偏置电路)限制在仅da功耗的17%。
Integrated Wideband Millimeter-Wave Bias-Tee – Application to Distributed Amplifier Biasing
A wideband fully-integrated bias-tee well suited for millimeter waves is presented. Compared to conventional bias-tees, where RF-choke is optimized on the basis of its inductance value, here, the proposed RF-choke takes advantage of its low parasitic capacitance as one of the design parameters. While enabling wideband operation, in particular towards lower frequencies, this bias-tee enables ease-of-implementation, robustness against resonance, efficient power delivery to the intended wideband circuit and contributes to circuit area reduction on integrated circuit (IC) implementation. As a proof-of-concept, a wideband CMOS distributed amplifier (DA) with a lower-corner frequency (Flower) of 5 GHz and an upper-corner frequency (Fupper) close to 100 GHz is implemented in STMicroelectronics’ 55-nm technology with the proposed bias-tee connected to its artificial drain line. The implemented bias-tee enabled a bandwidth close to 100 GHz and its RF-choke required a surface area of 82 µm x 82 µm. When integrated along with the DA, the overall chip area remained the same (0.89 mm2). Post-layout simulations showed a DC power overhead (due to inclusion of the on-chip bias-tee) limited to 17% of the DA-only consumption.