S. Ho, Y. Ohkura, M. Takuya, J. Prasad, N. Nakamura, S. Kubo
{"title":"采用点阵和器件蒙特卡罗耦合模拟分析了多声子热载流子诱导降解的机理","authors":"S. Ho, Y. Ohkura, M. Takuya, J. Prasad, N. Nakamura, S. Kubo","doi":"10.1109/SISPAD.2002.1034564","DOIUrl":null,"url":null,"abstract":"A new multi-phonon model for hydrogen desorption at Si/SiO/sub 2/ interface due to hot carriers is proposed for a multi-scale simulation, in which Lattice Monte Cairo method is coupled with Device Monte Cairo method by using a mediator-based common software platform. The power law between interface trap density and time (N/sub it//spl prop/t/sup a/) is demonstrated which shows good agreement with experimental results. It is shown that the multi-phonon mechanism has significant effect on reliability of MOS devices with ultra-short gate under low applied voltage.","PeriodicalId":249609,"journal":{"name":"International Conferencre on Simulation of Semiconductor Processes and Devices","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Hot carrier induced degradation due to multi-phonon mechanism analyzed by lattice and device Monte Carlo coupled simulation\",\"authors\":\"S. Ho, Y. Ohkura, M. Takuya, J. Prasad, N. Nakamura, S. Kubo\",\"doi\":\"10.1109/SISPAD.2002.1034564\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new multi-phonon model for hydrogen desorption at Si/SiO/sub 2/ interface due to hot carriers is proposed for a multi-scale simulation, in which Lattice Monte Cairo method is coupled with Device Monte Cairo method by using a mediator-based common software platform. The power law between interface trap density and time (N/sub it//spl prop/t/sup a/) is demonstrated which shows good agreement with experimental results. It is shown that the multi-phonon mechanism has significant effect on reliability of MOS devices with ultra-short gate under low applied voltage.\",\"PeriodicalId\":249609,\"journal\":{\"name\":\"International Conferencre on Simulation of Semiconductor Processes and Devices\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-11-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conferencre on Simulation of Semiconductor Processes and Devices\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SISPAD.2002.1034564\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conferencre on Simulation of Semiconductor Processes and Devices","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2002.1034564","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
摘要
提出了一种新的多声子模型,用于多尺度模拟Si/SiO/sub / 2/界面热载流子对氢的解吸,该模型采用基于介质的通用软件平台,将Lattice Monte Cairo方法与Device Monte Cairo方法相结合。给出了界面陷阱密度与时间的幂律(N/sub / it//spl prop/t/sup / a/),与实验结果吻合较好。结果表明,在低电压下,多声子机制对超短栅极MOS器件的可靠性有显著影响。
Hot carrier induced degradation due to multi-phonon mechanism analyzed by lattice and device Monte Carlo coupled simulation
A new multi-phonon model for hydrogen desorption at Si/SiO/sub 2/ interface due to hot carriers is proposed for a multi-scale simulation, in which Lattice Monte Cairo method is coupled with Device Monte Cairo method by using a mediator-based common software platform. The power law between interface trap density and time (N/sub it//spl prop/t/sup a/) is demonstrated which shows good agreement with experimental results. It is shown that the multi-phonon mechanism has significant effect on reliability of MOS devices with ultra-short gate under low applied voltage.