Etienne Faure, G. M. Almeida, M. Benabdenbi, P. Benoit, F. Clermidy, F. Pêcheux, G. Sassatelli, L. Torres
{"title":"用于自适应mp2soc的内存监控数据库","authors":"Etienne Faure, G. M. Almeida, M. Benabdenbi, P. Benoit, F. Clermidy, F. Pêcheux, G. Sassatelli, L. Torres","doi":"10.1109/DASIP.2010.5706252","DOIUrl":null,"url":null,"abstract":"The complexity of MP2SoC architectures to come is such that many issues arise simultaneously, such as multicore programming, system performance, reliability, scalability, etc. The key to solve these issues is self-adaptability: the chips to come have to integrate the required software and hardware means to monitor and self-react to the various kinds of events that are likely to occur during chip's lifetime. The paper describes the design principles of a software based approach used to monitor manycore architectures running multi-threaded functional applications. The approach takes advantage of an in-memory database (as well as appropriate means to store, handle, and retrieve accumulated monitoring data) to achieve the monitoring task as simply as possible. After a presentation of the distributed database (called DRET), a case study is presented, along with performance results that clearly show the interest of the approach.","PeriodicalId":158162,"journal":{"name":"2010 Conference on Design and Architectures for Signal and Image Processing (DASIP)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"An in-memory monitoring database for self adaptive MP2SoCs\",\"authors\":\"Etienne Faure, G. M. Almeida, M. Benabdenbi, P. Benoit, F. Clermidy, F. Pêcheux, G. Sassatelli, L. Torres\",\"doi\":\"10.1109/DASIP.2010.5706252\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The complexity of MP2SoC architectures to come is such that many issues arise simultaneously, such as multicore programming, system performance, reliability, scalability, etc. The key to solve these issues is self-adaptability: the chips to come have to integrate the required software and hardware means to monitor and self-react to the various kinds of events that are likely to occur during chip's lifetime. The paper describes the design principles of a software based approach used to monitor manycore architectures running multi-threaded functional applications. The approach takes advantage of an in-memory database (as well as appropriate means to store, handle, and retrieve accumulated monitoring data) to achieve the monitoring task as simply as possible. After a presentation of the distributed database (called DRET), a case study is presented, along with performance results that clearly show the interest of the approach.\",\"PeriodicalId\":158162,\"journal\":{\"name\":\"2010 Conference on Design and Architectures for Signal and Image Processing (DASIP)\",\"volume\":\"122 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 Conference on Design and Architectures for Signal and Image Processing (DASIP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DASIP.2010.5706252\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 Conference on Design and Architectures for Signal and Image Processing (DASIP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DASIP.2010.5706252","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An in-memory monitoring database for self adaptive MP2SoCs
The complexity of MP2SoC architectures to come is such that many issues arise simultaneously, such as multicore programming, system performance, reliability, scalability, etc. The key to solve these issues is self-adaptability: the chips to come have to integrate the required software and hardware means to monitor and self-react to the various kinds of events that are likely to occur during chip's lifetime. The paper describes the design principles of a software based approach used to monitor manycore architectures running multi-threaded functional applications. The approach takes advantage of an in-memory database (as well as appropriate means to store, handle, and retrieve accumulated monitoring data) to achieve the monitoring task as simply as possible. After a presentation of the distributed database (called DRET), a case study is presented, along with performance results that clearly show the interest of the approach.