故障检测问题及其对数字电路设计的影响

ESSCIRC 76: 2nd European Solid State Circuits Conference Pub Date : 1976-09-01 DOI:10.1109/ESSCIRC.1976.5469082

M. Diaz, M. Courvoisier, J. Geffroy

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引用次数: 0

摘要

本文介绍了检测逻辑结构中故障的主要方法。由于其局限性(结构的尺寸)，给出了修改电路以获得易于测试和/或自检系统的方法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Fault Detection Problems and their Impact on the Design of Digital Circuits

This communication presents the principal methods for detecting faults in logical structures. As a consequence of their limitations (size of the structures) methods for modifying the circuits in order to obtain easily testable and/or self-checking systems are given.

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ESSCIRC 76: 2nd European Solid State Circuits Conference

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