All assembly implementation of GSM-HR speech codec on a fixed point DSP

In the recent past there have been a lot of efforts in the development of speech coding algorithms and their implementations at bit rates lesser than 8 kbps. To support the development of such complex algorithms, computational power of digital signal processors (DSP's) increased tremendously. This lead to DSP's enriched with dedicated hardware support for various application specific features. The software development tools and compiler support has also improved to a large extent. This has slashed down the effort time in implementing the speech codecs. On the other hand, the cost of development tools may be prohibitive for non-vendors and at times high level code conversion tools may not be present at all. This paper emphasizes on the implementation methodology and optimization techniques commonly used to realize such systems where codec implementation in all assembly is necessary. The codec that was chosen for implementing these techniques was the GSM half rate (GSM HR) speech codec. The techniques described here are not limited to only one speech codec but are applicable to any kind of speech codec.