{"title":"N. mPc系统描述设施","authors":"C. W. Rose, L. Rogers, R. Straubs","doi":"10.1109/DAC.1979.1600160","DOIUrl":null,"url":null,"abstract":"N. mPc [1], an interactive environment for the design and evaluation o f microprocessor-based systems, has been developed and implemented at Case Western Reserve University. N.mPc contains five separate tools which work together to produce a functional register transfer level simulation of multiple processor, heterogeneous target systems. A system block diagram is shown in Figure 1.\n A meta assembler, metaMicro [2], allows the user to specify the Format, mnemonics, and associated bit patterns of the target instruction set. It maps mnemonics into bit strings, and outputs the instructions in a control/memory allocation graph which is machine independent.","PeriodicalId":345241,"journal":{"name":"16th Design Automation Conference","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1979-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"The N. mPc System Description Facility\",\"authors\":\"C. W. Rose, L. Rogers, R. Straubs\",\"doi\":\"10.1109/DAC.1979.1600160\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"N. mPc [1], an interactive environment for the design and evaluation o f microprocessor-based systems, has been developed and implemented at Case Western Reserve University. N.mPc contains five separate tools which work together to produce a functional register transfer level simulation of multiple processor, heterogeneous target systems. A system block diagram is shown in Figure 1.\\n A meta assembler, metaMicro [2], allows the user to specify the Format, mnemonics, and associated bit patterns of the target instruction set. It maps mnemonics into bit strings, and outputs the instructions in a control/memory allocation graph which is machine independent.\",\"PeriodicalId\":345241,\"journal\":{\"name\":\"16th Design Automation Conference\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1979-06-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"16th Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DAC.1979.1600160\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"16th Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DAC.1979.1600160","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
摘要
N. mPc[1]是一种用于设计和评估基于微处理器的系统的交互式环境,已在凯斯西储大学开发并实施。nmpc包含五个独立的工具,它们一起工作以产生多处理器,异构目标系统的功能寄存器传输级模拟。系统框图如图1所示。元汇编器metammicro[2]允许用户指定目标指令集的格式、助记符和相关的位模式。它将助记符映射为位串,并在与机器无关的控制/内存分配图中输出指令。
N. mPc [1], an interactive environment for the design and evaluation o f microprocessor-based systems, has been developed and implemented at Case Western Reserve University. N.mPc contains five separate tools which work together to produce a functional register transfer level simulation of multiple processor, heterogeneous target systems. A system block diagram is shown in Figure 1.
A meta assembler, metaMicro [2], allows the user to specify the Format, mnemonics, and associated bit patterns of the target instruction set. It maps mnemonics into bit strings, and outputs the instructions in a control/memory allocation graph which is machine independent.