G. Boarin, G. Chiappano, F. Maloberti, S. Napolitano, M. Porta
{"title":"VLSI实现的计量信号发生器用于开关系统的模拟终端","authors":"G. Boarin, G. Chiappano, F. Maloberti, S. Napolitano, M. Porta","doi":"10.1109/EASIC.1990.207983","DOIUrl":null,"url":null,"abstract":"Describes a mixed analog-digital integrated circuit to be employed in a Central Exchange Switching System. This generates a proper shaped telephone metering pulse, according to the actual international standards, and sends it to eight subscribers. It has been designed with a cell-based approach and implemented with a 3 mu m double poly single metal CMOS technology. 80% of the circuit uses digital and analog cells, while 20% has been specifically designed down to a transistor level. In order to reduce the power consumption two different supplies was used.<<ETX>>","PeriodicalId":205695,"journal":{"name":"[Proceedings] EURO ASIC `90","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"VLSI implementation of the metering signal generator for switching system analog terminations\",\"authors\":\"G. Boarin, G. Chiappano, F. Maloberti, S. Napolitano, M. Porta\",\"doi\":\"10.1109/EASIC.1990.207983\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Describes a mixed analog-digital integrated circuit to be employed in a Central Exchange Switching System. This generates a proper shaped telephone metering pulse, according to the actual international standards, and sends it to eight subscribers. It has been designed with a cell-based approach and implemented with a 3 mu m double poly single metal CMOS technology. 80% of the circuit uses digital and analog cells, while 20% has been specifically designed down to a transistor level. In order to reduce the power consumption two different supplies was used.<<ETX>>\",\"PeriodicalId\":205695,\"journal\":{\"name\":\"[Proceedings] EURO ASIC `90\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-05-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[Proceedings] EURO ASIC `90\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EASIC.1990.207983\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings] EURO ASIC `90","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EASIC.1990.207983","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
VLSI implementation of the metering signal generator for switching system analog terminations
Describes a mixed analog-digital integrated circuit to be employed in a Central Exchange Switching System. This generates a proper shaped telephone metering pulse, according to the actual international standards, and sends it to eight subscribers. It has been designed with a cell-based approach and implemented with a 3 mu m double poly single metal CMOS technology. 80% of the circuit uses digital and analog cells, while 20% has been specifically designed down to a transistor level. In order to reduce the power consumption two different supplies was used.<>