{"title":"基于可重构逻辑单元的双极双栅cntfet","authors":"K. Jabeur, I. O’Connor, S. L. Beux, D. Navarro","doi":"10.1145/2765491.2765494","DOIUrl":null,"url":null,"abstract":"This paper presents 2-input cells designed to perform reconfigurable operations in nanometric systems exploiting the ambipolar property of double-gate (DG) carbon nanotube (CNT) FETs. Previous work [12] described a dynamic logic cell generating only 14 functions instead of 16 normally performed by the multiplexer-based logic part of a CLB (Configurable Logic Block) of an FPGA for 2-inputs. In this work, a reconfigurable 2-input dynamic logic cell designed using DG-CNTFET devices is able to achieve a more complete set of functions by exploiting sum of products (SOP) and product of sums (POS) to express logic functions. We also demonstrated that a static logic version can be derived from this dynamic cell. Simulations reveal improvement factor of 3X in terms of delay and 23% of decrease in power consumption compared with the previous work [12]. When compared with 16nm-CMOS Technology, DG-CNTFET cells (dynamic logic and static logic style) showed a comparable PDP with a slight increase in area.","PeriodicalId":287602,"journal":{"name":"2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Ambipolar double gate CNTFETs based reconfigurable Logic cells\",\"authors\":\"K. Jabeur, I. O’Connor, S. L. Beux, D. Navarro\",\"doi\":\"10.1145/2765491.2765494\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents 2-input cells designed to perform reconfigurable operations in nanometric systems exploiting the ambipolar property of double-gate (DG) carbon nanotube (CNT) FETs. Previous work [12] described a dynamic logic cell generating only 14 functions instead of 16 normally performed by the multiplexer-based logic part of a CLB (Configurable Logic Block) of an FPGA for 2-inputs. In this work, a reconfigurable 2-input dynamic logic cell designed using DG-CNTFET devices is able to achieve a more complete set of functions by exploiting sum of products (SOP) and product of sums (POS) to express logic functions. We also demonstrated that a static logic version can be derived from this dynamic cell. Simulations reveal improvement factor of 3X in terms of delay and 23% of decrease in power consumption compared with the previous work [12]. When compared with 16nm-CMOS Technology, DG-CNTFET cells (dynamic logic and static logic style) showed a comparable PDP with a slight increase in area.\",\"PeriodicalId\":287602,\"journal\":{\"name\":\"2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-07-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/2765491.2765494\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2765491.2765494","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Ambipolar double gate CNTFETs based reconfigurable Logic cells
This paper presents 2-input cells designed to perform reconfigurable operations in nanometric systems exploiting the ambipolar property of double-gate (DG) carbon nanotube (CNT) FETs. Previous work [12] described a dynamic logic cell generating only 14 functions instead of 16 normally performed by the multiplexer-based logic part of a CLB (Configurable Logic Block) of an FPGA for 2-inputs. In this work, a reconfigurable 2-input dynamic logic cell designed using DG-CNTFET devices is able to achieve a more complete set of functions by exploiting sum of products (SOP) and product of sums (POS) to express logic functions. We also demonstrated that a static logic version can be derived from this dynamic cell. Simulations reveal improvement factor of 3X in terms of delay and 23% of decrease in power consumption compared with the previous work [12]. When compared with 16nm-CMOS Technology, DG-CNTFET cells (dynamic logic and static logic style) showed a comparable PDP with a slight increase in area.