IC封装对板级互连辐射敏感性的影响

2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2015-10-26 DOI:10.1109/SMACD.2015.7301676

Fatemeh Vafaee Zonouz, N. Masoumi, M. Mehri

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引用次数: 4

摘要

本文研究了集成电路封装对板级互连辐射磁化率的影响。考虑IC内部电路及其封装的负载效应，导出了IC引脚在频域的感应电压响应的封闭表达式。该配置位于暴露于外部电磁场的印刷电路板(PCB)上。此外，通过仿真验证了封装引线对集成电路磁化率的影响，研究了波形频率和照明角度对感应电压幅值的影响。集成电路内部电路及其封装表现为高通滤波器。它对低频信号进行衰减，但随着频率的增加，滤波效率降低。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Effect of IC package on radiated susceptibility of board level interconnection

In this paper the effect of integrated circuit (IC) package on radiated susceptibility of board level interconnection is investigated. A closed form expression is derived for the induced voltage response of an IC pin in the frequency domain, which considered the loading effect of IC internal circuit and its package. The configuration is located on printed circuit board (PCB) exposed to an external electromagnetic field. Moreover, simulations have been done to verify the effect of package lead on susceptibility of IC. The influence of the wave frequency and the illumination angle on the amplitude of induced voltages is studied. The IC internal circuit and its package behave as a high pass filter. It attenuates the low frequency signals, but as frequency increases, the filter efficiency decreases.

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2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)

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