Electrothermal modelling of through silicon via (TSV) interconnects

Electrothermal effects in through silicon via (TSV) interconnects are investigated in this paper. The temperature-dependent TSV capacitance is calculated with MOS effect in silicon substrate considered. The per-unit-length resistance and inductance of TSV arrays made of different filling materials are extracted numerically with the partial-element equivalent-circuit (PEEC) method, and insertion losses of some TSV pairs are examined for different silicon substrate resistivities. The electrothermal responses of some TSV arrays made of different materials are also investigated using the modified time-domain finite-element method (TD-FEM).